Business Wire

Imperas Delivers First RISC-V Simulator for New Vector and Bit Manipulation Specifications to Lead Customers

OXFORD, England--(BUSINESS WIRE)--Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced the delivery of its updated simulator for the RISC-V ...
Geeky Gadgets

RISC-V Vector Processing: A New Era in Computing Efficiency

The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...
Business Wire

SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors

SANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the gold standard for RISC-V computing, today announced that the company has partnered with Kinara to create a USB-based enablement board that ...
Design-Reuse

Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications

The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized ...
Liliputing

SiFive launches P470 and P670 RISC-V processors with vector instruction support

RISC-V chip designer SiFive is introducing two new processors that the company says are designed for high-performance, energy-efficient applications such as wearables, smart home devices, virtual ...
Yahoo Finance

SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center

SANTA CLARA, Calif., September 08, 2025--(BUSINESS WIRE)--Further expanding SiFive’s lead in RISC-V AI IP, the company today launched its 2nd Generation Intelligence™ family, featuring five new RISC-V ...
FOX59 News

Andes and MachineWare Collaborate on Early RISC-V Software Development for AndesCoreTM AX45MPV

Aachen, Germany and Hsinchu, Taiwan, Feb. 27, 2024 (GLOBE NEWSWIRE) -- MachineWare GmbH and Andes Technology (TWSE:6533), a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor ...
Nasdaq

Canaan’s RISC-V based edge AIoT SoC adopted VeriSilicon’s ISP and GPU IPs

Integrating VeriSilicon’s pixel processing IP portfolio into the high-precision, low-latency K230 chip SHANGHAI--(BUSINESS WIRE)-- VeriSilicon (688521.SH) today announced the integration of its Image ...

MIPS S8200 Delivers Software-First RISC-V NPU To Enable Physical AI at the Autonomous Edge

The most recent addition to the MIPS Atlas family of RISC-V processor IP, the MIPS S8200 RISC-V NPU delivers support for transformer and agentic language AI models at the edge, increased efficiency, ...
VentureBeat

RISC-V grows open source processor membership 130% in 2021

RISC-V International said it has grown during the pandemic as its RISC-V open source processor membership popped 130% in 2021. The nonprofit group's membership has grown from a ragtag group of feisty ...
Design-Reuse

Risc v pipeline IP Listing

AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, ...